{"id":2718,"date":"2019-03-04T19:01:04","date_gmt":"2019-03-04T18:01:04","guid":{"rendered":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/"},"modified":"2019-03-04T19:01:04","modified_gmt":"2019-03-04T18:01:04","slug":"phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems","status":"publish","type":"events","link":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/","title":{"rendered":"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems"},"content":{"rendered":"

Referent: Sakthivel Manikandan Sundharam<\/p>

Veranstaltungsdatum: 19. M\u00e4rz 2019 11:00 – 19. M\u00e4rz 2019 13:00<\/p>

Veranstaltungsort: Campus Belval, Maison du nombre, room 1.040<\/p>

Beschreibung<\/h2>

Cyb<\/span><\/span><\/span>e<\/span><\/span><\/span>r-Ph<\/span><\/span><\/span>ysi<\/span><\/span><\/span>cal<\/span><\/span><\/span> Sy<\/span><\/span><\/span>s<\/span><\/span><\/span>t<\/span><\/span><\/span>em<\/span><\/span><\/span> (CPS)<\/span><\/span><\/span> ar<\/span><\/span><\/span>e<\/span><\/span><\/span> sy<\/span><\/span><\/span>st<\/span><\/span><\/span>ems<\/span><\/span><\/span> pil<\/span><\/span><\/span>oti<\/span><\/span><\/span>ng<\/span><\/span><\/span> physi<\/span><\/span><\/span>cal<\/span><\/span><\/span> processes, which<\/span> h<\/span>a<\/span>ve<\/span> become an in<\/span>t<\/span>egr<\/span>al<\/span> p<\/span>art<\/span> of ou<\/span>r<\/span> d<\/span>ail<\/span>y<\/span> lif<\/span>e.<\/span> Model<\/span>-Dr<\/span>iven<\/span> En<\/span>gineering<\/span> (<\/span>MD<\/span>E)<\/span> is<\/span> widely<\/span> applied<\/span> in<\/span> t<\/span>he<\/span> indus<\/span>t<\/span>ry<\/span> t<\/span>o<\/span> develop<\/span> new<\/span> sof<\/span>t<\/span>w<\/span>ar<\/span>e<\/span> fun<\/span>ct<\/span>ions<\/span> an<\/span>d<\/span> in<\/span>t<\/span>egr<\/span>at<\/span>e<\/span> t<\/span>hem<\/span> in<\/span>t<\/span>o<\/span> t<\/span>he<\/span> ex<\/span>i<\/span>st<\/span>ing<\/span> ru<\/span>n-t<\/span>ime<\/span> envi<\/span>r<\/span>onmen<\/span>t<\/span> of a Cyb<\/span>e<\/span>r-Ph<\/span>ysi<\/span>cal<\/span> Syst<\/span>em<\/span> (CPS). <\/span>M<\/span>BD<\/span> provides<\/span> indispensable means<\/span> t<\/span>o<\/span> model an<\/span>d<\/span> implemen<\/span>t<\/span> th<\/span>e<\/span> des<\/span>ir<\/span>ed<\/span> fun<\/span>ct<\/span>ionali<\/span>t<\/span>y<\/span>,<\/span> and t<\/span>o<\/span> valid<\/span>ate<\/span> t<\/span>he<\/span> func<\/span>t<\/span>ional<\/span>,<\/span> t<\/span>he<\/span> non-func<\/span>t<\/span>ional<\/span>,<\/span> and<\/span> in<\/span> par<\/span>t<\/span>icular<\/span> t<\/span>he<\/span> r<\/span>eal<\/span>-t<\/span>ime<\/span> b<\/span>eh<\/span>a<\/span>vior<\/span> agains<\/span>t<\/span> t<\/span>he<\/span> r<\/span>equ<\/span>ir<\/span>emen<\/span>t<\/span>s<\/span>.<\/span> Cu<\/span>rr<\/span>en<\/span>t<\/span> indus<\/span>trial<\/span> p<\/span>ract<\/span>ice<\/span> in model-b<\/span>ased<\/span> developmen<\/span>t<\/span> c<\/span>ompl<\/span>et<\/span>ely<\/span> relies<\/span> on gene<\/span>rat<\/span>ive<\/span> MBD,<\/span> i<\/span>.e.,<\/span> on code<\/span> gener<\/span>at<\/span>ion<\/span> t<\/span>o<\/span> br<\/span>idge<\/span> th<\/span>e<\/span> gap bet<\/span>ween<\/span> model and implemen<\/span>tat<\/span>ion.<\/span> An alt<\/span>er<\/span>nat<\/span>ive<\/span> appr<\/span>oach,<\/span> alt<\/span>hough<\/span> not y<\/span>et<\/span> used<\/span> in t<\/span>he<\/span> au<\/span>t<\/span>omotive<\/span> dom<\/span>ain<\/span> is<\/span> model<\/span> in<\/span>t<\/span>erp<\/span>retat<\/span>ion.<\/span> In t<\/span>his<\/span> t<\/span>hesis<\/span>,<\/span> in t<\/span>he<\/span> pl<\/span>ace<\/span> of code<\/span> gener<\/span>at<\/span>ion,<\/span> we<\/span> inve<\/span>st<\/span>i<\/span>gat<\/span>e<\/span> t<\/span>he<\/span> appli<\/span>cab<\/span>ili<\/span>t<\/span>y<\/span> of model in<\/span>t<\/span>erpr<\/span>etat<\/span>ion<\/span> t<\/span>o<\/span> aut<\/span>om<\/span>ot<\/span>ive<\/span> sof<\/span>t<\/span>ware<\/span> developmen<\/span>t<\/span> w<\/span>it<\/span>h<\/span> a help<\/span> of a con<\/span>t<\/span>rol<\/span> func<\/span>ti<\/span>on<\/span> design<\/span>.<\/span> <\/span><\/span><\/span><\/span><\/span><\/p>

Th<\/span><\/span><\/span>e<\/span><\/span><\/span> con<\/span><\/span><\/span>t<\/span><\/span><\/span>rol<\/span><\/span><\/span> laws<\/span><\/span><\/span> of t<\/span>hese<\/span> software<\/span> fun<\/span>ct<\/span>ions<\/span> t<\/span>ypically<\/span> assume d<\/span>et<\/span>ermini<\/span>st<\/span>ic<\/span> sampling<\/span> rat<\/span>es<\/span> and<\/span> con<\/span>st<\/span>an<\/span>t<\/span> del<\/span>a<\/span>ys<\/span> from<\/span> inp<\/span>ut<\/span> t<\/span>o<\/span> ou<\/span>t<\/span>pu<\/span>t.<\/span> However<\/span>,<\/span> on t<\/span>he<\/span> t<\/span>arge<\/span>t<\/span> processors, t<\/span>he<\/span> e<\/span>x<\/span>ecu<\/span>t<\/span>ion<\/span> t<\/span>imes<\/span> of t<\/span>he<\/span> software<\/span> will<\/span> depend on many<\/span> fac<\/span>t<\/span>ors<\/span> such<\/span> as t<\/span>he<\/span> amoun<\/span>t<\/span> of in<\/span>t<\/span>erferen<\/span>ce<\/span>s f<\/span>r<\/span>om <\/span>ot<\/span>her <\/span>tas<\/span>k<\/span>s,<\/span> r<\/span>esul<\/span>t<\/span>ing in<\/span> v<\/span>ary<\/span>ing<\/span> del<\/span>a<\/span>ys<\/span> from sensing<\/span> t<\/span>o <\/span>act<\/span>u<\/span>at<\/span>i<\/span>ng.<\/span> The existing approaches support the simulation of control algorithms, but<\/span> n<\/span>ot<\/span> t<\/span>hei<\/span>r<\/span> act<\/span>u<\/span>al<\/span> implemen<\/span>tat<\/span>ion.<\/span>\u00a0 Further, in the thesis, we present the CPAL model interpretation engine running in a co-simulation environment to study control performances while considering the run-time delays. The main advantage is that the model developed for simulation can be re-used on the target processors. Additionally, the simulations performed at design phase can be made realistic in the timing dimension using timing annotations inserted in the models to capture the delays on the actual hardware. Introspection features natively available facilitate the implementation of self-adaptive and fault-tolerance strategies to mitigate and compensate the run-time latencies.<\/span><\/span><\/span><\/span><\/span><\/p>

As t<\/span>he<\/span> processing powe<\/span>r<\/span> is<\/span> in<\/span>cr<\/span>easingly<\/span> a<\/span>v<\/span>ai<\/span>l<\/span>ab<\/span>le<\/span> wi<\/span>t<\/span>h<\/span> t<\/span>od<\/span>a<\/span>y\u2019s<\/span> har<\/span>dw<\/span>ar<\/span>e<\/span>,<\/span> ot<\/span>he<\/span>r<\/span> conce<\/span>r<\/span>ns<\/span> t<\/span>han<\/span> execu<\/span>t<\/span>ion<\/span> performance su<\/span>c<\/span>h<\/span> as simpli<\/span>cit<\/span>y<\/span> and p<\/span>r<\/span>ed<\/span>ictabi<\/span>li<\/span>t<\/span>y<\/span> become impor<\/span>tant<\/span> f<\/span>act<\/span>ors<\/span> t<\/span>ow<\/span>ar<\/span>ds<\/span> <\/span><\/span>functional<\/span><\/span><\/span><\/i> <\/i>safety<\/span><\/span><\/span><\/i> <\/i>objective. Th<\/span>e<\/span> mot<\/span>iv<\/span>at<\/span>ion<\/span> t<\/span>ow<\/span>ar<\/span>ds<\/span> <\/span><\/span>pr<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i>dic<\/span><\/span><\/span><\/i>tab<\/span><\/span><\/span><\/i>l<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i> <\/i>execu<\/span><\/span><\/span>t<\/span><\/span><\/span>ion<\/span><\/span><\/span> b<\/span><\/span><\/span>ehavior<\/span><\/span><\/span>,<\/span><\/span><\/span> we<\/span><\/span><\/span> revisi<\/span><\/span><\/span>t<\/span><\/span><\/span>ed<\/span><\/span><\/span> FIF<\/span><\/span><\/span>O<\/span><\/span><\/span> scheduling<\/span><\/span><\/span> w<\/span><\/span><\/span>it<\/span><\/span><\/span>h<\/span><\/span><\/span> offs<\/span><\/span><\/span>et<\/span><\/span><\/span> and st<\/span>ri<\/span>ct<\/span>ly<\/span> periodic t<\/span>ask<\/span> act<\/span>iv<\/span>at<\/span>ions<\/span>.<\/span> Th<\/span>e<\/span> execu<\/span>t<\/span>ion<\/span> order<\/span> in<\/span> t<\/span>his<\/span> case<\/span> is<\/span> uniquely<\/span> and stat<\/span>ically<\/span> d<\/span>et<\/span>ermined<\/span>.<\/span> Th<\/span>is<\/span> means<\/span> t<\/span>h<\/span>at<\/span> wh<\/span>at<\/span>ever<\/span> t<\/span>he<\/span> execu<\/span>ti<\/span>on<\/span> pl<\/span>at<\/span>form<\/span> and<\/span> t<\/span>he<\/span> t<\/span>ask<\/span> execu<\/span>t<\/span>ion<\/span> t<\/span>imes<\/span>,<\/span> be<\/span> it in simul<\/span>ati<\/span>on<\/span> mode<\/span> in<\/span> a design<\/span> environmen<\/span>t<\/span> or at run<\/span>-t<\/span>ime<\/span> on t<\/span>he<\/span> act<\/span>ual<\/span> target,<\/span> t<\/span>he<\/span> t<\/span>ask<\/span> ex<\/span>ec<\/span>ut<\/span>ion<\/span> order will<\/span> r<\/span>emain<\/span> iden<\/span>t<\/span>i<\/span>cal.<\/span> Bey<\/span>ond<\/span> t<\/span>he<\/span> t<\/span>ask<\/span> e<\/span>x<\/span>ecu<\/span>t<\/span>ion<\/span> orde<\/span>r,<\/span> t<\/span>he<\/span> reading<\/span> and wr<\/span>it<\/span>ing<\/span> even<\/span>t<\/span>s<\/span> that<\/span> can be<\/span> observed<\/span> ou<\/span>t<\/span>side<\/span> t<\/span>he<\/span> t<\/span>asks<\/span> occur in<\/span> t<\/span>he<\/span> same<\/span> orde<\/span>r.<\/span> T<\/span>his<\/span> prope<\/span>rt<\/span>y<\/span>,<\/span> leve<\/span>r<\/span>aged<\/span> b<\/span>y<\/span> ou<\/span>r<\/span> M<\/span>BD<\/span> environmen<\/span>t<\/span> CPAL<\/span> design<\/span> flow<\/span> provides<\/span> a form<\/span> of t<\/span>iming<\/span> equivalen<\/span>t<\/span> b<\/span>eh<\/span>a<\/span>vior<\/span> bet<\/span>ween<\/span> <\/span><\/span>de<\/span><\/span><\/span><\/i>v<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i>lopm<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i>nt<\/span><\/span><\/span><\/i> <\/i>phas<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i> <\/i>and<\/span><\/span><\/span> run-tim<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i> <\/i>ph<\/span><\/span><\/span><\/i>as<\/span><\/span><\/span><\/i>e<\/span><\/span><\/span><\/i> <\/i>that<\/span><\/span><\/span> eases<\/span><\/span><\/span> t<\/span><\/span><\/span>he<\/span><\/span><\/span> implemen<\/span><\/span><\/span>tat<\/span><\/span><\/span>ion<\/span><\/span><\/span> of t<\/span>he<\/span> appli<\/span>cat<\/span>ion<\/span> and<\/span> t<\/span>he<\/span> verific<\/span>ati<\/span>on<\/span> of i<\/span>ts<\/span> t<\/span>iming<\/span> corre<\/span>ct<\/span>nes<\/span>s.<\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/span><\/p><\/div>

\u00a0<\/p>

In practice, the design of a software component involves designers from various viewpoints. In practice, while a designer from one discipline focuses on the core aspects of his field (for instance, a control engineer concentrates on designing a stable controller), he neglects or considers less importantly the other engineering aspects (for instance, real-time software engineering or energy efficiency). This may cause some of the functional and non-functional requirements not to be met satisfactorily. In the thesis, we present a model-driven co-design framework based on the timing tolerance contract to address such design gaps between control and real-time software engineering. This framework builds on earlier mentioned CPAL design environment, which enforces a timing-realistic behavior in simulation through timing and scheduling annotations. The application of our framework is exemplified in the design of an automotive control system. Through these case studies, we show that our tool enables not only to automate the analysis process at design time but also to enhance the design process by systematically combining models and analyses.<\/span><\/span><\/span><\/span><\/span><\/span><\/p><\/div><\/div><\/p><\/div><\/section>","protected":false},"excerpt":{"rendered":"","protected":false},"author":0,"featured_media":2719,"parent":0,"menu_order":0,"comment_status":"open","ping_status":"closed","template":"","format":"standard","meta":{"featured_image_focal_point":[],"show_featured_caption":false,"ulux_newsletter_groups":"","uluxPostTitle":"","uluxPrePostTitle":"","_trash_the_other_posts":false,"_price":"","_stock":"","_tribe_ticket_header":"","_tribe_default_ticket_provider":"","_tribe_ticket_capacity":"0","_ticket_start_date":"","_ticket_end_date":"","_tribe_ticket_show_description":"","_tribe_ticket_show_not_going":false,"_tribe_ticket_use_global_stock":"","_tribe_ticket_global_stock_level":"","_global_stock_mode":"","_global_stock_cap":"","_tribe_rsvp_for_event":"","_tribe_ticket_going_count":"","_tribe_ticket_not_going_count":"","_tribe_tickets_list":"[]","_tribe_ticket_has_attendee_info_fields":false,"event_start_date":"2019-03-19 11:00:00","event_end_date":"2019-03-19 13:00:00","event_speaker_name":"Sakthivel Manikandan Sundharam","event_speaker_link":"","event_is_online":false,"event_location":"Campus Belval, Maison du nombre, room 1.040","event_street":"6 avenue de la Fonte, 4364 Esch-sur-Alzette","event_location_link":"","event_zip_code":"","event_city":"","event_country":""},"events-topic":[],"events-type":[],"organisation":[226],"authorship":[],"acf":[],"yoast_head":"\nPhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems - Universit\u00e4t Luxemburg<\/title>\n<meta name=\"description\" content=\"Referent: Sakthivel Manikandan SundharamVeranstaltungsdatum: 19. M\u00e4rz 2019 11:00 - 19. M\u00e4rz 2019 13:00Veranstaltungsort: Campus Belval, Maison du nombre,\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/\" \/>\n<meta property=\"og:locale\" content=\"de_DE\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems\" \/>\n<meta property=\"og:description\" content=\"Referent: Sakthivel Manikandan SundharamVeranstaltungsdatum: 19. M\u00e4rz 2019 11:00 - 19. M\u00e4rz 2019 13:00Veranstaltungsort: Campus Belval, Maison du nombre,\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/\" \/>\n<meta property=\"og:site_name\" content=\"UNI DE\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/uni.lu\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2026\/03\/03120000\/UNIV_SM-Profile_1600x1600px-scaled.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"2560\" \/>\n\t<meta property=\"og:image:height\" content=\"2560\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Gesch\u00e4tzte Lesezeit\" \/>\n\t<meta name=\"twitter:data1\" content=\"3 Minuten\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/\",\"url\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/\",\"name\":\"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems - Universit\u00e4t Luxemburg\",\"isPartOf\":{\"@id\":\"https:\/\/www.uni.lu\/de\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#primaryimage\"},\"image\":{\"@id\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2019\/03\/default.jpg\",\"datePublished\":\"2019-03-04T18:01:04+00:00\",\"dateModified\":\"2019-03-04T18:01:04+00:00\",\"description\":\"Referent: Sakthivel Manikandan SundharamVeranstaltungsdatum: 19. M\u00e4rz 2019 11:00 - 19. M\u00e4rz 2019 13:00Veranstaltungsort: Campus Belval, Maison du nombre,\",\"breadcrumb\":{\"@id\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#breadcrumb\"},\"inLanguage\":\"de-DE\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"de-DE\",\"@id\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#primaryimage\",\"url\":\"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2019\/03\/default.jpg\",\"contentUrl\":\"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2019\/03\/default.jpg\",\"width\":1500,\"height\":1125},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\/\/www.uni.lu\/de\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Events\",\"item\":\"https:\/\/www.uni.lu\/de\/events\/\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/www.uni.lu\/de\/#website\",\"url\":\"https:\/\/www.uni.lu\/de\/\",\"name\":\"Uni.lu\",\"description\":\"Universit\u00e4t Luxemburg\",\"publisher\":{\"@id\":\"https:\/\/www.uni.lu\/de\/#organization\"},\"alternateName\":\"Universit\u00e4t Luxemburg\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/www.uni.lu\/de\/?s={search_term_string}\"},\"query-input\":\"required name=search_term_string\"}],\"inLanguage\":\"de-DE\"},{\"@type\":\"Organization\",\"@id\":\"https:\/\/www.uni.lu\/de\/#organization\",\"name\":\"Universit\u00e4t Luxemburg\",\"alternateName\":\"Uni.lu\",\"url\":\"https:\/\/www.uni.lu\/de\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"de-DE\",\"@id\":\"https:\/\/www.uni.lu\/de\/#\/schema\/logo\/image\/\",\"url\":\"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2026\/03\/03120000\/UNIV_SM-Profile_1600x1600px-scaled.jpg\",\"contentUrl\":\"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2026\/03\/03120000\/UNIV_SM-Profile_1600x1600px-scaled.jpg\",\"width\":2560,\"height\":2560,\"caption\":\"Universit\u00e4t Luxemburg\"},\"image\":{\"@id\":\"https:\/\/www.uni.lu\/de\/#\/schema\/logo\/image\/\"},\"sameAs\":[\"https:\/\/www.facebook.com\/uni.lu\",\"https:\/\/www.linkedin.com\/school\/university-of-luxembourg\/\",\"https:\/\/www.instagram.com\/uni.lu\",\"https:\/\/www.youtube.com\/@uni_lu\",\"https:\/\/en.wikipedia.org\/wiki\/University_of_Luxembourg\"]}]}<\/script>\n<!-- \/ Yoast SEO Premium plugin. -->","yoast_head_json":{"title":"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems - Universit\u00e4t Luxemburg","description":"Referent: Sakthivel Manikandan SundharamVeranstaltungsdatum: 19. M\u00e4rz 2019 11:00 - 19. M\u00e4rz 2019 13:00Veranstaltungsort: Campus Belval, Maison du nombre,","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/","og_locale":"de_DE","og_type":"article","og_title":"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems","og_description":"Referent: Sakthivel Manikandan SundharamVeranstaltungsdatum: 19. M\u00e4rz 2019 11:00 - 19. M\u00e4rz 2019 13:00Veranstaltungsort: Campus Belval, Maison du nombre,","og_url":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/","og_site_name":"UNI DE","article_publisher":"https:\/\/www.facebook.com\/uni.lu","og_image":[{"width":2560,"height":2560,"url":"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2026\/03\/03120000\/UNIV_SM-Profile_1600x1600px-scaled.jpg","type":"image\/jpeg"}],"twitter_card":"summary_large_image","twitter_misc":{"Gesch\u00e4tzte Lesezeit":"3 Minuten"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"WebPage","@id":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/","url":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/","name":"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems - Universit\u00e4t Luxemburg","isPartOf":{"@id":"https:\/\/www.uni.lu\/de\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#primaryimage"},"image":{"@id":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#primaryimage"},"thumbnailUrl":"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2019\/03\/default.jpg","datePublished":"2019-03-04T18:01:04+00:00","dateModified":"2019-03-04T18:01:04+00:00","description":"Referent: Sakthivel Manikandan SundharamVeranstaltungsdatum: 19. M\u00e4rz 2019 11:00 - 19. M\u00e4rz 2019 13:00Veranstaltungsort: Campus Belval, Maison du nombre,","breadcrumb":{"@id":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#breadcrumb"},"inLanguage":"de-DE","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/"]}]},{"@type":"ImageObject","inLanguage":"de-DE","@id":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#primaryimage","url":"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2019\/03\/default.jpg","contentUrl":"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2019\/03\/default.jpg","width":1500,"height":1125},{"@type":"BreadcrumbList","@id":"https:\/\/www.uni.lu\/de\/events\/phd-defence-timing-aware-model-based-design-with-application-to-automotive-embedded-systems\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.uni.lu\/de\/"},{"@type":"ListItem","position":2,"name":"Events","item":"https:\/\/www.uni.lu\/de\/events\/"},{"@type":"ListItem","position":3,"name":"PhD defence: Timing-aware Model-Based Design with Application to Automotive Embedded Systems"}]},{"@type":"WebSite","@id":"https:\/\/www.uni.lu\/de\/#website","url":"https:\/\/www.uni.lu\/de\/","name":"Uni.lu","description":"Universit\u00e4t Luxemburg","publisher":{"@id":"https:\/\/www.uni.lu\/de\/#organization"},"alternateName":"Universit\u00e4t Luxemburg","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.uni.lu\/de\/?s={search_term_string}"},"query-input":"required name=search_term_string"}],"inLanguage":"de-DE"},{"@type":"Organization","@id":"https:\/\/www.uni.lu\/de\/#organization","name":"Universit\u00e4t Luxemburg","alternateName":"Uni.lu","url":"https:\/\/www.uni.lu\/de\/","logo":{"@type":"ImageObject","inLanguage":"de-DE","@id":"https:\/\/www.uni.lu\/de\/#\/schema\/logo\/image\/","url":"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2026\/03\/03120000\/UNIV_SM-Profile_1600x1600px-scaled.jpg","contentUrl":"https:\/\/www.uni.lu\/wp-content\/uploads\/sites\/10\/2026\/03\/03120000\/UNIV_SM-Profile_1600x1600px-scaled.jpg","width":2560,"height":2560,"caption":"Universit\u00e4t Luxemburg"},"image":{"@id":"https:\/\/www.uni.lu\/de\/#\/schema\/logo\/image\/"},"sameAs":["https:\/\/www.facebook.com\/uni.lu","https:\/\/www.linkedin.com\/school\/university-of-luxembourg\/","https:\/\/www.instagram.com\/uni.lu","https:\/\/www.youtube.com\/@uni_lu","https:\/\/en.wikipedia.org\/wiki\/University_of_Luxembourg"]}]}},"_links":{"self":[{"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/events\/2718"}],"collection":[{"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/events"}],"about":[{"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/types\/events"}],"replies":[{"embeddable":true,"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/comments?post=2718"}],"version-history":[{"count":0,"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/events\/2718\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/media\/2719"}],"wp:attachment":[{"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/media?parent=2718"}],"wp:term":[{"taxonomy":"events-topic","embeddable":true,"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/events-topic?post=2718"},{"taxonomy":"events-type","embeddable":true,"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/events-type?post=2718"},{"taxonomy":"organisation","embeddable":true,"href":"https:\/\/www.uni.lu\/de\/wp-json\/wp\/v2\/organisation?post=2718"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}